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ASU Electronic Theses and Dissertations


This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.

In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.

Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.


Mime Type
  • application/pdf
Resource Type
  • Masters Thesis
Date Range
2010 2019


ABSTRACT As the technology length shrinks down, achieving higher gain is becoming very difficult in deep sub-micron technologies. As the supply voltages drop, cascodes are very difficult to implement and cascade amplifiers are needed to achieve sufficient gain with required output swing. This sets the fundamental limit on the SNR and hence the maximum resolution that can be achieved by ADC. With the RSD algorithm and the range overlap, the sub ADC can tolerate large comparator offsets leaving the linearity and accuracy requirement for the DAC and residue gain stage. Typically, the multiplying DAC requires high gain wide bandwidth op-amp …

Contributors
Swaminathan, Visu Vaithiyanathan, Barnaby, Hugh, Bakkaloglu, Bertan, et al.
Created Date
2012

The front end of almost all ADCs consists of a Sample and Hold Circuit in order to make sure a constant analog value is digitized at the end of ADC. The design of Track and Hold Circuit (THA) mainly focuses on following parameters: Input frequency, Sampling frequency, dynamic Range, hold pedestal, feed through error. This thesis will discuss the importance of these parameters of a THA to the ADCs and commonly used architectures of THA. A new architecture with SiGe HBT transistors in BiCMOS 130 nm technology is presented here. The proposed topology without complicated circuitry achieves high Spurious Free …

Contributors
Ramakrishna Rao, Nishita Ramakrishna, Barnaby, Hugh, Bakkaloglu, Bertan, et al.
Created Date
2012

The aging mechanism in devices is prone to uncertainties due to dynamic stress conditions. In AMS circuits these can lead to momentary fluctuations in circuit voltage that may be missed by a compact model and hence cause unpredictable failure. Firstly, multiple aging effects in the devices may have underlying correlations. The generation of new traps during TDDB may significantly accelerate BTI, since these traps are close to the dielectric-Si interface in scaled technology. Secondly, the prevalent reliability analysis lacks a direct validation of the lifetime of devices and circuits. The aging mechanism of BTI causes gradual degradation of the device …

Contributors
Patra, Devyani, Cao, Yu, Barnaby, Hugh, et al.
Created Date
2017

VCO as a ubiquitous circuit in many systems is highly demanding for the phase noises. Lowering the noise migrated from the power supply has been the trending topics for many years. Considering the Ring Oscillator(RO) based VCO is more sensitive to the supply noise, it is more significant to find out a useful technique to reduce the supply noise. Among the conventional supply noise reduction techniques such as filtering, channel length adjusting for the transistors, and the current noise mutual canceling, the new feature of the 28nm UTBB-FD-SOI process launched by the ST semiconductor offered a new method to reduce …

Contributors
Tang, Miao, Barnaby, Hugh, Bakkaloglu, Bertan, et al.
Created Date
2018

The thesis focuses on cost-efficient integration of the electro-chemical residue sensor (ECRS), a novel sensor developed for the in situ and real-time measurement of the residual impurities left on the wafer surface and in the fine structures of patterned wafers during typical rinse processes, and wireless transponder circuitry that is based on RFID technology. The proposed technology uses only the NMOS FD-SOI transistors with amorphous silicon as active material with silicon nitride as a gate dielectric. The proposed transistor was simulated under the SILVACO ATLAS Simulation Framework. A parametric study was performed to study the impact of different gate lengths …

Contributors
Pandit, Vedhas, Vermeire, Bert, Barnaby, Hugh, et al.
Created Date
2010

Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased efficiency, but at the cost of distortion. Class AB amplifiers have low efficiency, but high linearity. By modulating the supply voltage of a Class AB amplifier to make a Class H amplifier, the efficiency can increase while still maintaining the Class AB level of linearity. A 92dB Power Supply Rejection …

Contributors
Peterson, Cory Jay, Bakkaloglu, Bertan, Barnaby, Hugh, et al.
Created Date
2013

Optical receivers have many different uses covering simple infrared receivers, high speed fiber optic communication and light based instrumentation. All of them have an optical receiver that converts photons to current followed by a transimpedance amplifier to convert the current to a useful voltage. Different systems create different requirements for each receiver. High speed digital communication require high throughput with enough sensitivity to keep the bit error rate low. Instrumentation receivers have a lower bandwidth, but higher gain and sensitivity requirements. In this thesis an optical receiver for use in instrumentation in presented. It is an entirely monolithic design with …

Contributors
Lafevre, Kyle, Bakkaloglu, Bertan, Barnaby, Hugh, et al.
Created Date
2011

In thesis, a test time reduction (a low cost test) methodology for digitally-calibrated pipeline analog-to-digital converters (ADCs) is presented. A long calibration time is required in the final test to validate performance of these designs. To reduce total test time, optimized calibration technique and calibrated effective number of bits (ENOB) prediction from calibration coefficient will be presented. With the prediction technique, failed devices can be identified only without actual calibration. This technique reduces significant amount of time for the total test time. Dissertation/Thesis

Contributors
Kim, Kibeom, Ozev, Sule, Kitchen, Jennifer, et al.
Created Date
2013

The existing compact models can reproduce the characteristics of MOSFETs in the temperature range of -40oC to 125oC. Some applications require circuits to operate over a wide temperature range consisting of temperatures below the specified range of existing compact models, requiring wide temperature range compact models for the design of such circuits. In order to develop wide temperature range compact models, fourteen different geometries of n-channel and p-channel MOSFETs manufactured in a 0.18μm mixed-signal process were electrically characterized over a temperature range of 40 K to 298 K. Electrical characterization included ID-VG and ID-VD under different drain, body and gate …

Contributors
Kathuria, Achal, Barnaby, Hugh, Schroder, Dieter K, et al.
Created Date
2010

The RADiation sensitive Field Effect Transistor (RADFET) has been conventionally used to measure radiation dose levels. These dose sensors are calibrated in such a way that a shift in threshold voltage, due to a build-up of oxide-trapped charge, can be used to estimate the radiation dose. In order to estimate the radiation dose level using RADFET, a wired readout circuit is necessary. Using the same principle of oxide-trapped charge build-up, but by monitoring the change in capacitance instead of threshold voltage, a wireless dose sensor can be developed. This RADiation sensitive CAPacitor (RADCAP) mounted on a resonant patch antenna can …

Contributors
Srinivasan Gopalan, Madusudanan, Barnaby, Hugh, Holbert, Keith, et al.
Created Date
2010