ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
- Aberle, James
- 1 Arizona State University
- 1 Bakkaloglu, Bertan
- 1 Farahani, Bahar Jalali
- 1 Garrity, Douglas
- 1 Sivakumar, Balasubramanian
- 1 English
- 1 Public
- Correlated Level Shifting
- 1 Cyclic Converters
- 1 Data Converter
- 1 Electrical engineering
- 1 Filter Stages
- 1 Pipeline Converters
- 1 Switched Capacitors
- Dwarf Galaxies as Laboratories of Protogalaxy Physics: Canonical Star Formation Laws at Low Metallicity
- Evolutionary Genetics of CORL Proteins
- Social Skills and Executive Functioning in Children with PCDH-19
- Deep Domain Fusion for Adaptive Image Classification
- Software Defined Pulse-Doppler Radar for Over-The-Air Applications: The Joint Radar-Communications Experiment
Semiconductor device scaling has kept up with Moore's law for the past decades and they have been scaling by a factor of half every one and half years. Every new generation of device technology opens up new opportunities and challenges and especially so for analog design. High speed and low gain is characteristic of these processes and hence a tradeoff that can enable to get back gain by trading speed is crucial. This thesis proposes a solution that increases the speed of sampling of a circuit by a factor of three while reducing the specifications on analog blocks and keeping …
- Contributors
- Sivakumar, Balasubramanian, Farahani, Bahar Jalali, Garrity, Douglas, et al.
- Created Date
- 2012