ASU Electronic Theses and Dissertations

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Contributor
Resource Type
  • Masters Thesis
Date Range
2010 2017

Three-dimensional (3D) inductors with square, hexagonal and octagonal geometries have been designed and simulated in ANSYS HFSS. The inductors have been designed on Silicon substrate with through-hole via with different width, spacing and thickness. Spice modeling has been done in Agilent ADS and comparison has been made with results of custom excel based calculator and HFSS simulation results. Single ended quality factor was measured as 12.97 and differential ended quality factor was measured as 15.96 at a maximum operational frequency of 3.65GHz. The single ended and differential inductance was measured as 2.98nH and 2.88nH respectively at this frequency. Based on ...

Contributors
Abbey, Hemanshu, Bakkaloglu, Bertan, Kiaei, Sayfe, et al.
Created Date
2012

This thesis presents a power harvesting system combining energy from sub-cells of multi-junction photovoltaic (MJ-PV) cells. A dual-input, inductor time-sharing boost converter in continuous conduction mode (CCM) is proposed. A hysteresis inductor current regulation in designed to reduce cross regulation caused by inductor-sharing in CCM. A modified hill-climbing algorithm is implemented to achieve maximum power point tracking (MPPT). A dual-path architecture is implemented to provide a regulated 1.8V output. A proposed lossless current sensor monitors transient inductor current and a time-based power monitor is proposed to monitor PV power. The PV input provides power of 65mW. Measured results show that ...

Contributors
Peng, Qirong, Kiaei, Sayfe, Bakkaloglu, Bertan, et al.
Created Date
2017

The front end of almost all ADCs consists of a Sample and Hold Circuit in order to make sure a constant analog value is digitized at the end of ADC. The design of Track and Hold Circuit (THA) mainly focuses on following parameters: Input frequency, Sampling frequency, dynamic Range, hold pedestal, feed through error. This thesis will discuss the importance of these parameters of a THA to the ADCs and commonly used architectures of THA. A new architecture with SiGe HBT transistors in BiCMOS 130 nm technology is presented here. The proposed topology without complicated circuitry achieves high Spurious Free ...

Contributors
Ramakrishna Rao, Nishita Ramakrishna, Barnaby, Hugh, Bakkaloglu, Bertan, et al.
Created Date
2012

Power Management circuits are employed in almost all electronic equipment and they have energy storage elements (capacitors and inductors) as building blocks along with other active circuitry. Power management circuits employ feedback to achieve good load and line regulation. The feedback loop is designed at an operating point and component values are chosen to meet that design requirements. But the capacitors and inductors are subject to variations due to temperature, aging and load stress. Due to these variations, the feedback loop can cross its robustness margins and can lead to degraded performance and potential instability. Another issue in power management ...

Contributors
Malladi, Venkata Naga Koushik, Bakkaloglu, Bertan, Kitchen, Jennifer, et al.
Created Date
2015

This work implements three switched mode power amplifier topologies namely inverse class-D (CMCD), push-pull class-E and inverse push-pull class-E, in a GaN-on-Si process for medium power level (5-10W) femto/pico-cells base-station applications. The presented power amplifiers address practical implementation design constraints and explore the fundamental performance limitations of switched-mode power amplifiers for cellular band. The designs are analyzed and compared with respect to non-idealities like finite on-resistance, finite-Q of inductors, bond-wire effects, input signal duty cycle, and supply and component variations. These architectures are designed for non-constant envelope inputs in the form of digitally modulated signals such as RFPWM, which undergo ...

Contributors
Shukla, Shishir Ramasare, Kitchen, Jennifer N, Bakkaloglu, Bertan, et al.
Created Date
2015

As residential photovoltaic (PV) systems become more and more common and widespread, their system architectures are being developed to maximize power extraction while keeping the cost of associated electronics to a minimum. An architecture that has become popular in recent years is the "DC optimizer" architecture, wherein one DC-DC converter is connected to the output of each PV module. The DC optimizer architecture has the advantage of performing maximum power-point tracking (MPPT) at the module level, without the high cost of using an inverter on each module (the "microinverter" architecture). This work details the design of a proposed DC optimizer. ...

Contributors
Luster, Daniel, Ayyanar, Raja, Bakkaloglu, Bertan, et al.
Created Date
2014

Switching Converters (SC) are an excellent choice for hand held devices due to their high power conversion efficiency. However, they suffer from two major drawbacks. The first drawback is that their dynamic response is sensitive to variations in inductor (L) and capacitor (C) values. A cost effective solution is implemented by designing a programmable digital controller. Despite variations in L and C values, the target dynamic response can be achieved by computing and programming the filter coefficients for a particular L and C. Besides, digital controllers have higher immunity to environmental changes such as temperature and aging of components. The ...

Contributors
Mumma Reddy, Abhiram, Bakkaloglu, Bertan, Ogras, Umit, et al.
Created Date
2014

Phase locked loops are an integral part of any electronic system that requires a clock signal and find use in a broad range of applications such as clock and data recovery circuits for high speed serial I/O and frequency synthesizers for RF transceivers and ADCs. Traditionally, PLLs have been primarily analog in nature and since the development of the charge pump PLL, they have almost exclusively been analog. Recently, however, much research has been focused on ADPLLs because of their scalability, flexibility and higher noise immunity. This research investigates some of the latest all-digital PLL architectures and discusses the qualities ...

Contributors
Zazzera, Joshua, Bakkaloglu, Bertan, Bakkaloglu, Bertan, et al.
Created Date
2012

During the past decade, different kinds of fancy functions are developed in portable electronic devices. This trend triggers the research of how to enhance battery lifetime to meet the requirement of fast growing demand of power in portable devices. DC-DC converter is the connection configuration between the battery and the functional circuitry. A good design of DC-DC converter will maximize the power efficiency and stabilize the power supply of following stages. As the representative of the DC-DC converter, Buck converter, which is a step down DC-DC converter that the output voltage level is smaller than the input voltage level, is ...

Contributors
Fu, Chao, Bakkaloglu, Bertan, Cao, Yu, et al.
Created Date
2011

Dissertation/Thesis

Contributors
Javidahmadabadi, Mahdi, Kitchen, Jennifer, Bakkaloglu, Bertan, et al.
Created Date
2015

This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.

In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.

Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries.

For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.