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Simulation of MOSFETs, BJTs and JFETs At and Near the Pinch-off Region


Abstract Semiconductor devices are generally analyzed with relatively simple equations or with detailed computer simulations. Most text-books use these simple equations and show device diagrams that are frequently very simplified and occasionally incorrect. For example, the carrier densities near the pinch-off point in MOSFETs and JFETs and the minority carrier density in the base near the reverse-biased base-collector junction are frequently assumed to be zero or near zero. Also the channel thickness at the pinch-off point is often shown to approach zero. None of these assumptions can be correct. The research in thesis addresses these points. I simulated the carrier densities, potentials, electric fields etc. of MOSFETs, BJTs and JFETs at and near ... (more)
Created Date 2011
Contributor Yang, Xuan (Author) / Schroder, Dieter K (Advisor) / Vasileska, Dragica (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Subject Electrical engineering / BJT / JFET / MOSFET / pinch-off
Type Masters Thesis
Extent 92 pages
Language English
Copyright
Reuse Permissions All Rights Reserved
Note M.S. Electrical Engineering 2011
Collaborating Institutions Graduate College / ASU Library
Additional Formats MODS / OAI Dublin Core / RIS


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Description Dissertation/Thesis