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Compact Modeling and Simulation for Digital Circuit Aging

Abstract Negative bias temperature instability (NBTI) is a leading aging mechanism in modern digital and analog circuits. Recent NBTI data exhibits an excessive amount of randomness and fast recovery, which are difficult to be handled by conventional power-law model (tn). Such discrepancies further pose the challenge on long-term reliability prediction under statistical variations and Dynamic Voltage Scaling (DVS) in real circuit operation. To overcome these barriers, the modeling effort in this work (1) practically explains the aging statistics due to randomness in number of traps with log(t) model, accurately predicting the mean and variance shift; (2) proposes cycle-to-cycle model (from the first-principle of trapping) to handle aging under multi... (more)
Created Date 2012
Contributor Velamala, Jyothi Bhaskarr Amarnadh (Author) / Cao, Yu (Advisor) / Clark, Lawrence (Committee member) / Chakrabarti, Chaitali (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Subject Electrical engineering / Circuit Reliability / Device Aging / Modeling and Simulation
Type Doctoral Dissertation
Extent 122 pages
Language English
Reuse Permissions All Rights Reserved
Note Ph.D. Electrical Engineering 2012
Collaborating Institutions Graduate College / ASU Library
Additional Formats MODS / OAI Dublin Core / RIS

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Description Dissertation/Thesis