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Scratchpad Management in Software Managed Manycore Architectures


Abstract Caches have long been used to reduce memory access latency. However, the increased complexity of cache coherence brings significant challenges in processor design as the number of cores increases. While making caches scalable is still an important research problem, some researchers are exploring the possibility of a more power-efficient SRAM called scratchpad memories or SPMs. SPMs consume significantly less area, and are more energy-efficient per access than caches, and therefore make the design of on-chip memories much simpler. Unlike caches, which fetch data from memories automatically, an SPM requires explicit instructions for data transfers. SPM-only architectures are thus named as software managed manycore (SMM), since the data moveme... (more)
Created Date 2017
Contributor Cai, Jian (Author) / Shrivastava, Aviral (Advisor) / Wu, Carole (Committee member) / Ren, Fengbo (Committee member) / Dasgupta, Partha (Committee member) / Arizona State University (Publisher)
Subject Computer science / compiler / multicore / scratchpad memory / SPM
Type Doctoral Dissertation
Extent 112 pages
Language English
Copyright
Reuse Permissions All Rights Reserved
Note Doctoral Dissertation Computer Science 2017
Collaborating Institutions Graduate College / ASU Library
Additional Formats MODS / OAI Dublin Core / RIS


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Description Dissertation/Thesis