Embedding Logic and Non-volatile Devices in CMOS Digital Circuits for Improving Energy Efficiency
Abstract | Static CMOS logic has remained the dominant design style of digital systems for more than four decades due to its robustness and near zero standby current. Static CMOS logic circuits consist of a network of combinational logic cells and clocked sequential elements, such as latches and flip-flops that are used for sequencing computations over time. The majority of the digital design techniques to reduce power, area, and leakage over the past four decades have focused almost entirely on optimizing the combinational logic. This work explores alternate architectures for the flip-flops for improving the overall circuit performance, power and area. It consists of three main sections. First, is the design of a multi-input configurable fli... (more) |
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Created Date | 2018 |
Contributor | Yang, Jinghua (Author) / Vrudhula, Sarma (Advisor) / Barnaby, Hugh (Committee member) / Cao, Yu (Committee member) / Seo, Jae-sun (Committee member) / Arizona State University (Publisher) |
Subject | Electrical engineering / Computer engineering / High performance ASIC / Minimum energy / Multi-input Flip-flop / Non-volatile / Reconfigurable / Threshold logic |
Type | Doctoral Dissertation |
Extent | 180 pages |
Language | English |
Copyright |
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Reuse Permissions | All Rights Reserved |
Note | Doctoral Dissertation Electrical Engineering 2018 |
Collaborating Institutions | Graduate College / ASU Library |
Additional Formats | MODS / OAI Dublin Core / RIS |