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CMOS Integrated Power Amplifiers for RF Reconfigurable and Digital Transmitters


Abstract This dissertation focuses on three different efficiency enhancement methods that are applicable to handset applications. These proposed designs are based on three critical requirements for handset application: 1) Small form factor, 2) CMOS compatibility and 3) high power handling. The three presented methodologies are listed below:

1) A transformer-based power combiner architecture for out-phasing transmitters

2) A current steering DAC-based average power tracking circuit for on-chip power amplifiers (PA)

3) A CMOS-based driver stage for GaN-based switched-mode power amplifiers applicable to fully digital transmitters

This thesis highlights the trends in wireless handsets, the motivates the need for fully-integrated CMOS power amplifier... (more)
Created Date 2019
Contributor Moallemi, Soroush (Author) / Kitchen, Jennifer (Advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Subject Electrical engineering / CMOS / Integrated Circuits / Power Amplifier / Radio Frequency / Reconfigurable / Transmitter
Type Doctoral Dissertation
Extent 168 pages
Language English
Copyright
Note Doctoral Dissertation Electrical Engineering 2019
Collaborating Institutions Graduate College / ASU Library
Additional Formats MODS / OAI Dublin Core / RIS


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Description Dissertation/Thesis