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Optimizing the Design of Partially and Fully Depleted MESFETs for Low Dropout Regulators


Abstract The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the process flow or adding additional steps, which in turn, leads to an increase in fabrication costs. Si-MESFETs (silicon-metal-semiconductor-field-effect-transistors) from Arizona State University (ASU) on the other hand, have an inherent high voltage capability and can be added to any silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) CMOS process free of cost. This has been proved at five different commercial foundri... (more)
Created Date 2010
Contributor Lepkowski, William (Author) / Thornton, Trevor (Advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Subject Electrical Engineering / Engineering / LDO / MESFET
Type Doctoral Dissertation
Extent 172 pages
Language English
Copyright
Reuse Permissions All Rights Reserved
Note Ph.D. Electrical Engineering 2010
Collaborating Institutions Graduate College / ASU Library
Additional Formats MODS / OAI Dublin Core / RIS


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Description Dissertation/Thesis