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An Analytical Approach to Efficient Circuit Variability Analysis in Scaled CMOS Design


Abstract Process variations have become increasingly important for scaled technologies starting at 45nm. The increased variations are primarily due to random dopant fluctuations, line-edge roughness and oxide thickness fluctuation. These variations greatly impact all aspects of circuit performance and pose a grand challenge to future robust IC design. To improve robustness, efficient methodology is required that considers effect of variations in the design flow. Analyzing timing variability of complex circuits with HSPICE simulations is very time consuming. This thesis proposes an analytical model to predict variability in CMOS circuits that is quick and accurate. There are several analytical models to estimate nominal delay performance but very lit... (more)
Created Date 2011
Contributor Gummalla, Samatha (Author) / Chakrabarti, Chaitali (Advisor) / Cao, Yu (Advisor) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Subject Electrical Engineering / Analytical Modeling / Delay Model / Modeling and performance analysis / Threshold voltage variation / Variability
Type Masters Thesis
Extent 72 pages
Language English
Copyright
Reuse Permissions All Rights Reserved
Note M.S. Electrical Engineering 2011
Collaborating Institutions Graduate College / ASU Library
Additional Formats MODS / OAI Dublin Core / RIS


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Description Dissertation/Thesis